Google AMD TPU 10th Gen CPU Integration Surges

Google partners with AMD for TPU v10, integrating CPU cores for RL workloads. Shift from accelerator-only to hybrid ASICs signals rising CPU demand in AI inference.

Woofun AI reports that Google is collaborating with AMD to develop the 10th generation of its Tensor Processing Units, marking AMD's first entry into custom AI ASIC projects. The partnership leverages AMD's CPU core IP, advanced packaging, and interconnect technologies to address CPU-intensive workloads like reinforcement learning. While traditional large language model training remains accelerator-dependent, agent-based inference requires general-purpose computing resources alongside accelerators.

Google's recent TPU 8i systems pair every two TPUs with a Google Axion CPU, contrasting with seventh-generation servers that used one Intel Xeon processor per four TPUs. This configuration suggests a trend toward a 1:1 CPU-to-accelerator ratio in specific scenarios, indicating that future AI computing may rely more heavily on CPUs than previously recognized. If finalized, this collaboration will combine Google's TPU accelerators with AMD's general-purpose cores to create hybrid AI ASICs, potentially reshaping the data center chip competitive landscape.